A Novel Process for SiGe Core-Shell JAM Transistors Fabrication and Thermal Annealing Effect on Its Electrical Performance

Ashish Kumar (Department of Electrical Engineering, National Cheng Kung University, Taiwan)
Wen-Hsi Lee (Department of Electrical Engineering, National Cheng Kung University, Taiwan)

Article ID: 1399

Abstract


In this study, we fabricate Si/SiGe core-shell Junctionless accumulationmode (JAM)FinFET devices through a rapid and novel process with fourmain steps, i.e. e-beam lithography definition, sputter deposition, alloycombination annealing, and chemical solution etching. The height of Sicore is 30 nm and the thickness of Si/SiGe core-shell is about 2 nm. Afterfinishing the fabrication of devices, we widely studied the electrical characteristics of poly Si/SiGe core-shell JAM FinFET transistors from a viewof different Lg and Wch. A poly-Si/SiGe core -shell JAMFETs was successfully demonstrated and it also exhibits a superior subthreshold swingof 81mV/dec and high on/off ratio > 105 when annealing for 1hr at 600°C.The thermal diffusion process condition for this study are 1hr at 600°C and6hr at 700°C for comparison. The annealing condition at 700oC for 6 hoursshows undesired electrical characteristics against the other. Results suggeststhat from over thermal budget causes a plenty of Ge to precipitate againstto form SiGe thin film. Annealing JAMFETs at low temperature showsoutstanding Subthreshold swing and better swing condition when compared to its counterpart i.e. at higher temperature. This new process can stillfabricate a comparable performance to classical planar FinFET in drivingcurrent.

Keywords


Junctionless-accumulation (JAM) FET;Junctionless (JL) FET;SiGe core-shell;Rapid thermal anneal Subthreshold swing (SS)

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References


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DOI: https://doi.org/10.30564/ssid.v1i2.1399

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